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Sr. Physical Design Engineer, Annapurna Labs
Annapurna Labs (U.S.) Inc.β’Cupertino, California, USA
Full-timeSenior
ποΈ 0 viewsβ’π 0 applicationsβ’Posted 10/9/2026β’Expires 11/9/2026
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Job Description
Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time agoβeven yesterday.
Our - Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering - BS + 8yrs or MS + 6yrs in EE/CS - Experience scripting with Python, Perl, Bash or PowerShell - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm - Block Design using EDA tools (examples: Cadence, Mentor Graphics, Synopsys, or Others) including synthesis, equivalency verification, floor planning, bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, and ECO - Deep understanding on sign-off activities (timing, ir/em, physical verification)
Required Skills
Design EngineeringElectrical EngineeringPython
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