Hardware Engineer - RTL/GDS/STA

Hardware Engineer (General) - RTL to GDS & STA Location : Bangalore Experience : 3-6 Years Role : Hardware Engineer - RTL/GDS Implementation Job Summary : We are looking for a skilled Hardware Engineer with hands-on experience in RTL-to-GDS implementation, including synthesis, physical design, routing, and Static Timing Analysis (STA). The ideal candidate should have experience working with industry-standard Synopsys or Cadence tools. Key Responsibilities : - Perform RTL-to-GDS implementation from synthesis through placement, clock tree synthesis, routing, and design closure. - Execute logic synthesis and physical implementation using Synopsys/Cadence tools. - Perform Static Timing Analysis (STA) and analyze timing paths, setup/hold violations, and timing closure. - Work on timing optimization and resolve design implementation issues. - Collaborate with RTL, physical design, and verification teams to achieve PPA and timing targets. - Debug and resolve implementation and timing-related issues across design stages. - Generate and analyze implementation reports to ensure design quality and performance. Required Skills : - 3-6 years of experience in RTL-to-GDS implementation. - Strong hands-on experience in Synthesis to Route. - Experience with Static Timing Analysis (STA) using Synopsys PrimeTime. - Hands-on experience with one or more of : 1. Synopsys Fusion Compiler 2. Cadence Genus 3. Cadence Innovus - Good understanding of timing constraints, timing analysis, and closure. - Experience with industry-standard ASIC implementation methodologies. Good to Have : - Experience with PrimeTime PX (PTPX). - Experience with Power Artist. - Knowledge of power analysis and optimization. - Exposure to advanced-node ASIC implementation is an added advantage. Preferred Tools : Fusion Compiler | Genus | Innovus | PrimeTime | PrimeTime PX | Power Artist Education : B.E./B.Tech/M.E./M.Tech in Electrical / Electronics / VLSI / ECE or related discipline.