Staff Silicon Design Engineer (DFT)

Overview At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Role DFT engineer will lead a strong engineering team on Scan, MBIST, iJTAG test development of latest AMD products. The IPs range from complex processors, AI computation blocks, to state‑of‑the‑art controller IPs which provide automotive, data center, machine learning and high‑speed communication solutions. You will work closely with designers to make sure DFT structures are correctly implemented, with test engineers to ensure ATE test programs can be generated from the DFT (ATPG, MBIST) tools, with product engineers to ensure scan/MBIST production tests run seamlessly and stably, and with yield engineers to debug and root‑cause failures/defects. You will also expand technical knowledge beyond DFT into embedded processor firmware, complex chip simulation, RTL implementation for ASIC & FPGA, and deep silicon debug work all the way to high‑volume production requirements. This role oversees the complete silicon cycle from design to production phases. The Person We are looking for candidates that can communicate complex engineering subjects effectively to cross‑functioning technical teams and upper management. Strong DFT and leadership skills will be put to good use. A successful Member of Technical Staff DFT engineer will interact with many external teams and must confidently represent his or her organization. Key Responsibilities • Manage DFT engineers, resolving technical challenges and meeting product schedule. • Work within AMD’s global quality and operation organization to drive best manufacturing test solutions through pre and post‑silicon activities. • Collaborate closely with design teams to ensure DFT structures are correctly implemented. • Develop, implement, and verify DFT schemes on hard‑IP in AMD ASIC and FPGA products. • Implement techniques to test digital logic using Scan Compression, Stuck‑At, Transition, and Path‑Delay fault models. • Test other parts of the design, including memory, mixed‑signal, I/Os, custom LBISTs and MBISTs, IEEE1149.1 JTAG, and IEEE1687 IJTAG. • Develop firmware‑driven, cost‑effective test strategies and methodologies with built‑in diagnosis capability to enable efficient debugging and fault isolation on bench or ATE. • Collaborate with New Product Introduction and Test/Product teams to ensure timely delivery of robust test patterns, and manage debugging of pattern issues on bench or ATE to root‑cause problems. • Assist in diagnosis and yield enhancement throughout the product lifecycle. • Build an adaptive and cohesive team to take up any challenging tasks entrusted by management. Preferred Experience • Experience in DFT engineering through pre and post‑silicon cycles. • Experience in creating and implementing complex chip‑level DFT architecture. • Experience in DFT implementation including Scan and Scan Compression at IP and SoC level. • Experience with DFT tools, ATPG (Stuck‑At, At‑Speed, Path‑Delay) and scan compression. • Strong MBIST knowledge. • Knowledge of Tessent Streaming Scan Network SSN and hands‑on experience is a big plus. • Proficient in logic design using Verilog and experience in synthesis and STA. • Experience developing test benches and simulation in RTL/GATE/SDF environments. • Knowledge of FPGA synthesis and design flow is a plus. • Experience with post‑silicon debug and bench equipment (e.g., oscilloscope and logic analyzer). • Good communication skills, works well in a group environment that spans across continents. • Comfortable in Linux environment and writing/using scripting languages such as Perl, Tcl, etc. Academic Credentials • MS or Ph.D. in Electrical/Electronic/Computer Engineering. Location Singapore Benefits and EEO Statement Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. #J-18808-Ljbffr